Omlo is a language for Field Programmable Gate Arrays (FPGAs), for configuring Forever Computers just before they run applications.

Using Omlo, you lay out the logical circuitry of the CPU, graphics and sound peripherals, and the interconnects between them. You also specify the minimum requirements of the Forever Computer hardware will need to fulfill: clock speeds, memory resources, etc.

Its primary differences from other HDLs like Verilog and VHDL are that Omlo sacrifices some power to be easy to use and more statically predictable in terms of performance, and is more geared towards symbolic representation.

It is currently under heavy development, but currently here is how a free counter is implemented:

block free-counter|width|init|dir enable:bool > current:uint:width # Store the current count in a register that's always enabled reg|width|init .true store > current # The net to indicate if all of the preceeding digits are 1 net carry:uint:width+1 link carry[width+1] > NC # A down counter is an up counter with all the ones and zeros swapped block abstract-free-counter|one|zero count 1 width > i map carry[i] current[i] > carry[i+1] store zero zero > zero zero zero one > zero one one zero > zero one one one > one one match dir :up abstract-free-counter|1|0 link enable > carry[1] :down abstract-free-counter|0|1 # Carry is essentially acting as our enable - negate for :down map enable > carry[1] 0 > 1 1 > 0